The Packaging Bottleneck: Advanced Packaging as the AI Chokepoint
Advanced packaging is the most acute physical bottleneck in the AI infrastructure supply chain. Every high-performance AI chip — from NVIDIA's Blackwell to Google's TPU — requires advanced packaging (CoWoS, hybrid bonding, 2.5D/3D integration) to connect compute dies with HBM memory stacks. TSMC's CoWoS capacity has been sold out since 2023, with expansion timelines measured in years, not quarters. The companies that control packaging capacity and equipment — TSMC, BESI (hybrid bonding), ASE (OSAT), and substrate makers — have structural pricing power because there is no workaround for physics.
Why Packaging Is the Bottleneck
Modern AI chips are not monolithic — they are systems of multiple dies (compute, memory, I/O) connected through advanced packaging. NVIDIA's Blackwell GPU uses TSMC's CoWoS (Chip-on-Wafer-on-Substrate) to bond compute dies with HBM3E memory stacks. Without this packaging step, the chip doesn't function.
The problem: advanced packaging capacity is far more constrained than wafer fabrication. TSMC can fabricate more wafers than it can package. This makes packaging the throughput limiter for the entire AI chip supply chain. Every additional NVIDIA GPU requires packaging capacity that doesn't exist yet.
Key Players and Investment Angle
TSMC controls the majority of CoWoS capacity and is investing heavily to expand — but new capacity takes 18-24 months to come online. Pricing power is strong.
BESI is the leading supplier of hybrid bonding equipment — the next-generation packaging technology that enables higher-density chip-to-chip connections. Hybrid bonding is essential for HBM4 and future architectures. BESI's order book is a forward indicator for packaging capacity expansion.
ASE Technology is the largest OSAT (outsourced semiconductor assembly and test) provider, handling advanced packaging for clients who can't access TSMC's CoWoS.
Substrate makers (Ibiden, Shinko, Samsung Electro-Mechanics) provide the organic and glass substrates that form the base layer of advanced packages. Substrate supply is another constraint within the constraint.
What This Means for Portfolios
Packaging companies trade at lower multiples than compute companies (NVIDIA, AMD) despite having comparable bottleneck positioning. This valuation gap exists because packaging is less visible to generalist investors. Closelook's Constraint Sectors thesis suggests this gap narrows as the market recognizes that AI chip supply is packaging-limited, not fabrication-limited.